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Data Annotation TechNo subject matter listed
Computer Code Programming
ImageI have extensive experience in hardware design development, specializing in utilizing hardware design platforms to generate critical training data for enhancing enterprise Large Language Models (LLMs). With a background in HDLs such as Verilog, SystemVerilog, and VHDL, I have developed, configured, and customized platforms to generate high-quality training datasets, directly contributing to the improvement of LLMs’ performance and efficiency. My expertise spans coding, debugging, and optimizing hardware solutions, ensuring they meet the highest standards for LLM training and benchmarking.
Development of hardware design to generate the training data to enhance enterprise LLMs' capabilities.
Master of Science, Microelectronics
Bachelor, Electrical Engineering
Tech Development
Research Assistant
